000 03992nam a2200457 i 4500
001 000697156
003 OCoLC
005 20240105153047.0
008 170712t20162016caua rb 000 0 eng d
020 _a1627059296
020 _a9781627059299
020 _a162705930X
020 _a9781627059305
035 _a419546
040 _aYDXCP
_bspa
_erda
_cYDXCP
_dUIASF
050 4 _aTK 7895.M4
_bY87.2016
100 1 _aYu, Shimeng
_c(Ingeniero electrico)
_eautor
245 1 0 _aResistive random access memory (RRAM) :
_bfrom devices to array architectures /
_cShimeng Yu, Arizona State University.
264 1 _aSan Rafael, California :
_bMorgan & Claypool Publishers,
_c2016
264 4 _c©2016
300 _avii, 71 páginas :
_bilustraciones, diagramas, gráficas ;
_c24 cm
336 _atexto
_btxt
_2rdacontent
337 _asin mediación
_bn
_2rdamedia
338 _avolumen
_bnc
_2rdacarrier
490 1 _aSynthesis lectures on emerging engineering technologies
_v6
504 _aIncluye bibliografía (páginas 57-69).
505 0 _a1. Introduction to RRAM technology -- 1.1 Overview of emerging memory technologies -- 1.2 RRAM basics -- 1.3 Recent research and development of RRAM technology --
505 8 _a2. Device fabrication and performances -- 2.1 Device fabrication: forming-free and scalability -- 2.2 Device performances -- 2.3 Device reliability --
505 8 _a3. RRAM characterization and modeling -- 3.1 Overview of RRAM physical mechanism -- 3.2 Materials and electrical characterization -- 3.3 Numerical modeling using kinetic Monte-Carlo method -- 3.4 Compact modeling for spice simulation --
505 8 _a4. RRAM array architecture -- 4.1 1T1R array -- 4.2 Cross-point array -- 4.3 Selector device -- 4.4 Peripheral circuits design -- 4.5 3D integration --
505 8 _a5. Outlook for RRAM's applications -- Bibliography -- Author biography.
520 3 _aRRAM technology has made significant progress in the past decade as a competitive candidate for the next generation non-volatile memory (NVM). This lecture is a comprehensive tutorial of metal oxide-based RRAM technology from device fabrication to array architecture design. State-of-the-art RRAM device performances, characterization, and modeling techniques are summarized, and the design considerations of the RRAM integration to large-scale array with peripheral circuits are discussed. Chapter 2 introduces the RRAM device fabrication techniques and methods to eliminate the forming process, and will show its scalability down to sub-10 nm regime. Then the device performances such as programming speed, variability control, and multi-level operation are presented, and finally the reliability issues such as cycling endurance and data retention are discussed. Chapter 3 discusses the RRAM physical mechanism, and the materials characterization techniques to observe the conductive filaments and the electrical characterization techniques to study the electronic conduction processes. It also presents the numerical device modeling techniques for simulating the evolution of the conductive filaments as well as the compact device modeling techniques for circuit-level design. Chapter 4 discusses the two common RRAM array architectures for large-scale integration: one-transistor-one-resistor (1T1R) and cross-point architecture with selector. The write/read schemes are presented and the peripheral circuitry design considerations are discussed. Finally, a 3D integration approach is introduced for building ultra-high density RRAM array. Chapter 5 is a brief summary and will give an outlook for RRAM's potential novel applications beyond the NVM applications.
650 0 _aNonvolatile random-access memory.
650 4 _xMemoria de acceso aleatorio no volátil
830 0 _aSynthesis lectures on emerging engineering technologies
_v# 6.
905 _a01
942 1 _cNEWBFXC1
999 _c652825
_d652825
980 _851
_gRonald RUIZ